SN74AUP1T50 gate equivalent, schmitt-trigger buffer gate.
1
* Single-Supply Voltage Translator
* Output Level Up to Supply VCC CMOS Level
– 1.8 V to 3.3 V (at VCC = 3.3 V)
– 2.5 V to 3.3 V.
with output referenced to supply VCC.
AUP technology is the industry's lowest-power logic technology designed for use in.
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